By Alexander Supalov, Andrey Semin, Christopher Dahnken, Michael Klemm
Optimizing HPC functions with Intel® Cluster instruments takes the reader on a travel of the fast-growing region of excessive functionality computing and the optimization of hybrid courses. those courses ordinarily mix allotted reminiscence and shared reminiscence programming versions and use the Message Passing Interface (MPI) and OpenMP for multi-threading to accomplish the final word target of excessive functionality at low strength intake on enterprise-class workstations and compute clusters.
The ebook makes a speciality of optimization for clusters along with the Intel® Xeon processor, however the optimization methodologies additionally observe to the Intel® Xeon Phi™ coprocessor and heterogeneous clusters blending either architectures. along with the educational and reference content material, the authors tackle and refute many myths and misconceptions surrounding the subject. The textual content is augmented and enriched by way of descriptions of real-life situations.
What you’ll learn
- Practical, hands-on examples convey how you can make clusters and workstations in response to Intel® Xeon processors and Intel® Xeon Phi™ coprocessors "sing" in Linux environments
- How to grasp the synergy of Intel® Parallel Studio XE 2015 Cluster version, along with Intel® Composer XE, Intel® MPI Library, Intel® hint Analyzer and Collector, Intel® VTune™ Amplifier XE, and lots of different beneficial tools
- How to accomplish rapid and tangible optimization effects whereas refining your knowing of software program layout principles
Who this booklet is for
software program execs will use this e-book to layout, improve, and optimize their parallel courses on Intel structures. scholars of desktop technology and engineering will worth the booklet as a complete reader, appropriate to many optimization classes provided all over the world. The amateur reader will get pleasure from an intensive grounding within the intriguing international of parallel computing.
Table of Contents
Foreword via Bronis de Supinski, CTO, Livermore Computing, LLNL
Chapter 1: No Time to learn this Book?
Chapter 2: review of Platform Architectures
Chapter three: Top-Down software program Optimization
Chapter four: Addressing method Bottlenecks
Chapter five: Addressing program Bottlenecks: disbursed Memory
Chapter 6: Addressing program Bottlenecks: Shared Memory
Chapter 7: Addressing software Bottlenecks: Microarchitecture
Chapter eight: software layout Considerations